시장보고서
상품코드
2148242

글래스 코어 반도체 기판 시장 규모, 점유율 및 성장 예측(2026-2032년)

Glass Core Semiconductor Substrates Market Size, Share & Growth Forecast 2026-2032

발행일: | 리서치사: 구분자 Knowledge Sourcing Intelligence | 페이지 정보: 영문 150 Pages | 배송안내 : 1-2일 (영업일 기준)

    
    
    



가격
PDF & Excel (Single User License) help
PDF, Excel 보고서를 1명만 이용할 수 있는 라이선스입니다. 텍스트 등의 복사 및 붙여넣기는 가능하지만, 출처를 명시해야 합니다. 인쇄는 1회만 가능하며, 인쇄물의 이용 범위는 PDF 및 Excel 파일의 이용 범위에 따릅니다.
US $ 3,950 금액 안내 화살표 ₩ 5,337,000
PDF & Excel (Multi User License - Up to 5 Users) help
PDF, Excel 보고서를 동일 사업장에서 5명까지 이용할 수 있는 라이선스입니다. 텍스트 등의 복사 및 붙여넣기는 가능하지만, 출처를 명시해야 합니다. 인쇄는 5회까지만 가능하며, 인쇄물의 이용은 PDF 및 Excel 파일의 이용 범위에 따릅니다.
US $ 4,550 금액 안내 화살표 ₩ 6,148,000
PDF & Excel (Enterprise License) help
PDF, Excel 보고서를 동일 기업의 모든 분이 이용할 수 있는 라이선스입니다. 텍스트 등의 복사 및 붙여넣기는 가능하지만, 출처를 명시해야 합니다. 인쇄 횟수에는 제한이 없으며, 인쇄된 문서의 이용 범위는 PDF 및 Excel 파일의 이용 범위에 따릅니다.
US $ 6,950 금액 안내 화살표 ₩ 9,391,000
※ 부가세 별도
한글목차
영문목차
※ 본 상품은 영문 자료로 한글과 영문 목차에 불일치하는 내용이 있을 경우 영문을 우선합니다. 정확한 검토를 위해 영문 목차를 참고해주시기 바랍니다.

글래스 코어 반도체 기판 시장은 2026년에 1,200만 달러로 추정되며, 2032년까지 2억 3,000만 달러에 이를 것으로 예측됩니다. 이것은 2026-2032년 CAGR 63.6%를 기록할 것임을 나타내는 것입니다.

패키지 기판은 반도체 패키지와 인쇄 회로 기판 사이에 배치됩니다. 이는 전기 신호 및 전력을 전달하는 동시에 기계적 지지 역할도 수행합니다. 기존의 고성능 기판에서는 일반적으로 유기 코어를 둘러싸는 형태로 유기 적층 재료가 사용됩니다. 인공지능(AI)용 패키지가 커짐에 따라 실리콘, 유기 소재 및 패키지 구조 간의 열팽창 계수 불일치로 인해 조립 시나 작동 시 뒤틀림이 발생하기 쉽습니다. 유리는 더 높은 강성, 뛰어난 치수 안정성, 반도체 소재에 가까운 열팽창 계수를 실현함으로써 이 문제를 해결합니다. 전기적인 관점에서도 유리의 장점은 마찬가지로 중요합니다. 더 매끄럽고 안정적인 코어를 통해 층간 정렬 정밀도가 향상되고, 더 미세한 배선이 가능하며, 유리 관통 비아(TGV)를 통한 고밀도 수직 연결이 가능해집니다. 인텔(Intel)은 유리 기판이 유기 기판에 비해 훨씬 높은 상호 연결 밀도를 실현하여, 더 큰 폼 팩터를 가진 패키지를 가능하게 한다고 보고하고 있습니다. 또한 유리는 수동 부품의 내장, 광학 구조의 통합, 그리고 특정 패키지 아키텍처에 필요한 배선 층 수를 줄이는 등의 기회도 창출합니다. 상용화는 단순한 재료의 대체가 아닙니다. 기판 제조업체에게는 유리 취급, 고정밀 비아 형성, 시드 층 증착, 구리 충전, 재배선 층, 빌드업 적층, 개별화 및 검사에 관한 새로운 기술력이 요구됩니다. 균열, 모서리 손상, 메탈라이제이션의 접착력, 비아 결함, 패널 취급 등은 수율을 저하시키는 요인이 됩니다. 따라서 유력한 공급업체들은 미처리 유리만을 판매하는 데 그치지 않고, 메탈라이제이션, 빌드업 공정, 검사, 패키지 조립 및 설계 규칙과 연계하여 글래스 코어를 개발하고 있습니다.

시장 성장 촉진요인

  • AI 가속기 패키지에는 더 크고, 더 평탄하며, 더 안정적인 기판이 요구됩니다. 인공지능 가속기에서는 대형 로직 다이와 여러 개의 고대역폭 메모리 스택, 칩렛, 고속 입출력 인터페이스를 결합하는 경향이 강해지고 있습니다. 그 결과, 패키지 면적은 기존 프로세서 패키지보다 대폭 커지고, 상호 연결의 수도 급증합니다. 유기 코어는 패키지 치수가 커질수록 뒤틀림이나 휘어짐이 발생하기 쉬워, 파인 피치 조립이 어려워집니다. 유리는 대형 기판 전체에 걸쳐 정렬을 유지하는 데 필요한 강성과 치수 안정성을 제공합니다. 이를 통해 패키지의 수율과 전기적 성능이 공정 복잡화로 인한 추가 비용을 정당화할 수 있는 강력한 도입 근거가 마련됩니다.
  • 칩렛 통합으로 인해 배선 밀도가 높아지고, 패키지 수준의 상호 연결 요구 사항도 더욱 엄격해집니다. 이종 통합으로 인해 시스템 수준의 연결 대부분이 패키지 내부로 이동합니다. 로직 칩렛, 메모리, 가속기 및 특수 입출력 다이는 안정적인 전력 공급을 받으면서, 단거리 고밀도 연결을 통해 데이터를 교환해야 합니다. 글라스 코어는 기계적으로 안정적인 플랫폼 내에서 미세 배선, 고밀도 글라스 관통 비아 구조 및 이식형 부품을 지원할 수 있습니다. 따라서 이 기술은 그렇지 않으면 점점 더 복잡해지는 유기 배선 스택이나 대형 실리콘 인터포저를 필요로 하는 칩렛 아키텍처를 보완하는 역할을 합니다.
  • 패널 수준의 가공은 대형 기판의 규모 확대를 위한 길을 열어줍니다. 유리는 큰 직사각형 패널 형태로 가공할 수 있으므로, 대면적 패키지 기판에서 제조상의 이점을 가져다줄 가능성이 있습니다. 패널 수준의 가공을 통해 공정당 처리 유닛 수를 늘리고, 수율이 상업적 목표에 도달했을 때 재료 낭비를 줄일 수 있습니다. Absolics사는 미국에서 패널 기반 제조 기술을 개발하고 있습니다. 아시아의 기판 및 소재 제조업체들도 시범 생산 및 양산 체제를 확대되고 있습니다. 경제적 이점은 대량 생산을 위해 핸들링 자동화, 비아 수율, 메탈라이제이션 균일성, 그리고 개별화 성능이 충분히 개선되느냐에 달려 있습니다.
  • 전력 공급 및 고속 신호 전송 요건은 저손실 패키지 플랫폼을 선호하는 경향이 있습니다. 인공지능 및 서버용 프로세서의 경우, 점점 더 복잡해지는 패키지에서 대전류 공급과 극히 높은 데이터 전송 속도가 요구됩니다. 유리는 뛰어난 전기 절연성과 유전 특성을 갖추고 있습니다. 그 내열성 덕분에 패키지 공정의 유연성이 더욱 높아집니다. 인텔은 또한 유리 기반 패키지 아키텍처 내에 인덕터, 커패시터 및 광 인터커넥트 구조를 통합할 가능성에 대해서도 강조하고 있습니다. 이러한 기능 덕분에 가치 제안은 기계적 뒤틀림 제어의 범위를 넘어, 유리를 첨단 패키징 공동 설계를 위한 보다 광범위한 플랫폼으로 자리매김하게 될 것입니다.

시장 제약 요인

  • 상용화 채택은 기술적 관심의 부족이라기보다는 제조 기술의 성숙도에 의해 제약받고 있습니다. 유리 관통 비아(via) 형성 시에는 균열이나 용납할 수 없는 측벽 손상을 일으키지 않으면서 고밀도화를 실현해야 합니다. 구리 메탈라이제이션은 유리에 확실하게 밀착되어야 합니다. 열 사이클로 인해 재료의 계면에 응력이 발생할 가능성이 있습니다. 또한 대형 패널의 경우 전용 취급, 검사 및 개별화 장비가 필요합니다. 이러한 과제는 초기 생산 단계에서 수율 저하 및 비용 증가로 이어질 수 있습니다. 패키지 기판은 반도체 조립 공정 전반에 걸쳐 전기적, 기계적, 열적 신뢰성 요건을 충족해야 하므로 인증 주기가 길어집니다. 또한 유기 기판도 지속적으로 개선되고 있습니다. 고객이 기존 패키지 플랫폼을 재설계하기 위해서는 유리가 시스템 수준에서 명확한 우위를 보여야 합니다.

목차

제1장 주요 요약

제2장 시장 개요

제3장 시장 규모와 예측(2026-2032년)

제4장 시장 : 패키지 아키텍처별

제5장 시장 : 용도별

제6장 제조 기술

제7장 시장 : 고객 유형별

제8장 지역 시장

제9장 시장 역학

제10장 경쟁 구도

제11장 기업 개요

제12장 최근 동향

제13장 부록

LSH 26.10.20

The Glass Core Semiconductor Substrates Market is estimated at USD 12.0 million in 2026 and is projected to reach USD 230.0 million by 2032, representing a CAGR of 63.6% across 2026-2032.

The package substrate sits between the semiconductor package and the printed circuit board. It carries electrical signals and power while providing mechanical support. Conventional high-end substrates typically use organic build-up materials around an organic core. As artificial intelligence packages become larger, the mismatch in thermal expansion between silicon, organic materials and the package structure can increase warpage during assembly and operation. Glass addresses this problem through higher stiffness, better dimensional stability and a coefficient of thermal expansion that can be engineered closer to semiconductor materials. The electrical case for glass is equally important. A smoother and more stable core can support tighter layer-to-layer registration, finer routing and dense vertical connections through through-glass vias. Intel has reported that glass substrates can provide substantially higher interconnect density than organic alternatives and enable larger form-factor packages. Glass also creates opportunities to embed passive components, integrate optical structures and reduce the number of routing layers required for selected package architectures. Commercialization is not a simple material substitution. Substrate manufacturers need new capabilities for glass handling, precision via formation, seed-layer deposition, copper filling, redistribution layers, build-up lamination, singulation and inspection. Cracking, edge damage, metallization adhesion, via defects and panel handling can reduce yield. The strongest suppliers are therefore developing the glass core together with metallization, build-up processes, inspection, package assembly and design rules rather than selling untreated glass alone.

Market Drivers

  • AI accelerator packages require larger, flatter and more stable substrates. Artificial intelligence accelerators increasingly combine large logic dies with multiple high-bandwidth memory stacks, chiplets and high-speed input and output interfaces. The resulting package area is substantially larger than a conventional processor package and the number of interconnections rises sharply. Organic cores can distort or warp as package dimensions increase, making fine-pitch assembly more difficult. Glass provides the rigidity and dimensional stability needed to preserve alignment across large substrates. This creates a strong adoption case where package yield and electrical performance justify the additional process complexity.
  • Chiplet integration increases routing density and package-level interconnect requirements. Heterogeneous integration shifts more system-level connectivity into the package. Logic chiplets, memory, accelerators and specialized input and output dies must exchange data across short, high-density connections while receiving stable power. Glass cores can support fine routing, dense through-glass via structures and embedded components within a mechanically stable platform. The technology therefore complements chiplet architectures that would otherwise require increasingly complex organic routing stacks or large silicon interposers.
  • Panel-level processing creates a pathway to scale large substrates. Glass can be processed in large rectangular panels, creating a potential manufacturing advantage for high-area package substrates. Panel-level processing can increase the number of units handled per process step and reduce material waste when yields reach commercial targets. Absolics is developing panel-based manufacturing in the United States. Asian substrate and materials companies are expanding pilot and production capabilities. The economic benefit depends on handling automation, via yield, metallization uniformity and singulation performance improving sufficiently for high-volume manufacturing.
  • Power delivery and high-speed signaling requirements favor low-loss package platforms. Artificial intelligence and server processors require high current delivery and very high data rates across increasingly complex packages. Glass offers favorable electrical insulation and dielectric characteristics. Its thermal tolerance enables additional package-process flexibility. Intel has also highlighted the potential to integrate inductors, capacitors and optical interconnect structures within glass-based package architectures. These capabilities expand the value proposition beyond mechanical warpage control and position glass as a broader platform for advanced package co-design.

Market Restraints

  • Commercial adoption is constrained by manufacturing maturity rather than lack of technical interest. Through-glass via formation must achieve high density without creating cracks or unacceptable sidewall damage. Copper metallization must adhere reliably to glass. Thermal cycling can introduce stress at material interfaces. Large panels also require specialized handling, inspection and singulation equipment. These challenges can create yield loss and increase cost during early production. Qualification cycles are long because package substrates must meet electrical, mechanical and thermal reliability requirements across the full semiconductor assembly process. Organic substrates also continue to improve. Glass must demonstrate a clear system-level advantage before customers redesign established package platforms.

Technology and Segment Insights

  • Glass-core flip-chip ball grid array and large advanced package substrates represent the primary commercialization path. They can replace the mechanically limiting organic core while retaining familiar build-up and assembly concepts. Through-glass via enabled structures provide vertical connectivity through the glass. Redistribution layers and dielectric build-up layers create the fine horizontal routing needed to connect chiplets and package terminals. Embedded-component glass substrates are a smaller emerging architecture that can integrate passive or active devices to shorten electrical paths and reduce package footprint.
  • Glass interposer structures remain an adjacent opportunity, particularly for radio-frequency, photonics and high-density heterogeneous integration. In these applications, glass can offer electrical isolation, low loss and dimensional stability while supporting through-glass vias. The distinction between a glass core package substrate and a glass interposer can narrow as package architectures incorporate multiple routing levels, embedded devices and optical functions within the same platform.
  • Artificial intelligence accelerators and high-performance computing are the leading commercial targets. These packages combine large area, dense interconnects and strong pressure to reduce power loss. Server central processing units and custom application-specific integrated circuits represent another important opportunity as chiplet designs expand. Radio-frequency and millimeter-wave systems can use glass for low-loss signal transmission and precise dimensional control. Co-packaged optics and photonic integration create a longer-term path where optical and electrical functions are brought closer to compute dies.
  • The market is segmented by package architecture, application, manufacturing technology, customer type and geography. Package architectures include glass-core flip-chip ball grid array substrates, through-glass via enabled glass core substrates, embedded-component glass substrates, and glass interposer and hybrid architectures. Applications include AI accelerators and GPUs, high-performance computing and server CPUs, custom ASICs and chiplet-based processors, RF and millimeter-wave devices, co-packaged optics and photonic integration, and other advanced semiconductor packages. Manufacturing technologies include glass panel preparation and handling, through-glass via formation, seed layer and copper metallization, redistribution layer formation, build-up dielectric and fine-line routing, and inspection, singulation and reliability testing. Customer types include integrated device manufacturers, fabless semiconductor companies, foundries and advanced packaging providers, package substrate manufacturers, and defense and high-reliability electronics.
  • Initial volume adoption is expected after 2027 in high-performance computing applications. Through-glass via formation and metallization remain critical manufacturing yield and reliability challenges. Asia Pacific leads substrate manufacturing depth while North America anchors early commercialization programs. Glass enables larger package formats, tighter routing and improved dimensional stability for chiplets.

Competitive and Strategic Outlook

  • Competition is still defined by technology readiness, customer qualification and manufacturing yield rather than installed high-volume capacity. Absolics is one of the most advanced dedicated glass-substrate suppliers and is using its Georgia facility to move from pilot manufacturing toward commercialization. Intel is developing glass substrates as part of its advanced packaging roadmap, focusing on future large-package and high-density computing applications. Samsung Electro-Mechanics is building an integrated glass-core and package-substrate capability and has publicly indicated mass-production plans after 2027.
  • Toppan participates through next-generation package substrates and glass interposer technologies. Specialty glass suppliers such as AGC, Corning, SCHOTT and Nippon Electric Glass provide material capabilities relevant to substrate flatness, thermal expansion, panel processing and high-frequency performance. Established package-substrate companies including Ibiden, Shinko Electric Industries, Unimicron, Kinsus and AT&S represent potential manufacturing participants as customer demand shifts from organic cores toward hybrid or glass-core platforms.
  • Competitive differentiation depends on more than the glass material. Suppliers must control via quality, metallization, fine-line redistribution, build-up adhesion, panel warpage, crack prevention, electrical inspection and package reliability. Companies that can provide design support and co-qualification with advanced packaging customers are likely to gain an advantage during the first commercial programs.
  • Asia Pacific has the deepest manufacturing ecosystem for glass core semiconductor substrates. The region combines advanced package-substrate suppliers, specialty glass producers, materials companies, semiconductor assembly providers and major artificial intelligence hardware customers. South Korea is emerging as a central commercialization hub. Samsung Electro-Mechanics operates a pilot line for glass package substrates and is building a glass-core supply structure with Sumitomo Chemical Group and Dongwoo Fine-Chem. SKC continues to fund Absolics and related glass-substrate development. The region also benefits from established flip-chip ball grid array manufacturing, build-up materials, plating chemistry, precision equipment and substrate inspection capabilities.
  • Japan contributes specialty glass, materials and substrate-processing expertise. Toppan is developing glass-core flip-chip ball grid array substrates and glass interposers. Companies across the Japanese materials ecosystem supply glass formulations, photoresists, build-up films, plating materials and precision processing equipment. Taiwan remains important through its concentration of advanced packaging, foundry and artificial intelligence accelerator production. This creates a natural qualification environment for glass substrate technologies once commercial volumes become available.
  • The region also benefits from close proximity between substrate manufacturers and package customers. Glass core adoption requires repeated co-development around design rules, through-glass via pitch, build-up stack, warpage, assembly temperature and package reliability. Locating pilot and production capability close to semiconductor packaging operations can reduce qualification time. This favors Asian manufacturing clusters during the early ramp even as U.S. policy support increases domestic capacity.
  • North America is the strongest early technology-development and strategic-investment region through Intel and Absolics. Intel has developed glass substrate technology at its advanced packaging operations in Arizona. Absolics operates its Covington, Georgia facility with federal support. Europe participates mainly through specialty glass, materials, precision equipment and research capabilities rather than large-volume package-substrate production.
  • Recent developments confirm accelerating market activity. In September 2026, Samsung Electro-Mechanics showcased glass substrates and related package technologies for AI accelerators, servers and data-center applications at KPCA Show 2026. In September 2026, SKC approved an additional KRW 281 billion investment in Absolics to accelerate glass-substrate commercialization and reliability evaluation. In May 2026, SEMI and Global Net Corp. released a dedicated glass core substrate market and development report, projecting rapid growth after 2028. In February 2026, SKC announced a KRW 1 trillion rights issue, with approximately KRW 590 billion allocated to Absolics product development. In July 2026, Samsung Electro-Mechanics and Sumitomo Chemical Group signed an agreement to establish a glass-core manufacturing joint venture and target mass production after 2027. In 2025, U.S. CHIPS program support for Absolics expanded the domestic glass-core packaging research, manufacturing and supplier ecosystem in Georgia.

Conclusion

  • The glass core semiconductor substrates market is at an early commercialization stage with very high growth potential. Growth is driven by AI package warpage limits, chiplet interconnect scaling, panel-level manufacturing economics and power delivery requirements. Initial volume adoption is expected after 2027 in high-performance computing. Through-glass via yield, metallization reliability and long qualification cycles remain the key restraints. Asia Pacific leads manufacturing depth, while North America anchors early commercialization. The market is projected to grow from USD 12.0 million in 2026 to USD 230.0 million by 2032 at a CAGR of 63.6%.

Key Benefits of this Report

  • Insightful Analysis: Detailed market insights across regions, customer segments, policies, socio-economic factors, consumer preferences, and industry verticals.
  • Competitive Landscape: Understand strategic moves by key players to identify optimal market entry approaches.
  • Market Drivers and Future Trends: Assess major growth forces and emerging developments shaping the market.
  • Actionable Recommendations: Support strategic decisions to unlock new revenue streams.
  • Caters to a Wide Audience: Suitable for startups, research institutions, consultants, SMEs, and large enterprises.

What Businesses Use Our Reports For

  • Industry and market insights, opportunity assessment, product demand forecasting, market entry strategy, geographical expansion, capital investment decisions, regulatory analysis, new product development, and competitive intelligence.

Report Coverage

  • Historical data from 2021 to 2024, Base year 2025, and Forecast years from 2026 to 2032
  • Growth opportunities, challenges, supply chain outlook, regulatory framework, and trend analysis
  • Competitive positioning, strategies, and market share evaluation, and trade analysis
  • Revenue growth and forecast assessment across segments and regions
  • Company profiling including strategies, products, financials, and key developments

TABLE OF CONTENTS

1. Executive Summary

  • 1.1. Market Opportunity and Key Findings
  • 1.2. Commercialization Timeline
  • 1.3. Technology Readiness and Adoption Outlook

2. Market Overview

  • 2.1. Role of the Package Core in Advanced Semiconductor Packaging
  • 2.2. Organic Core Limitations in Large AI Packages
  • 2.3. Glass Material Properties and Package-Level Benefits
  • 2.4. Through-Glass Via Architecture
  • 2.5. Glass Handling, Metallization and Build-Up Integration

3. Market Size and Forecast, 2026-2032

  • 3.1. Global Market Revenue
  • 3.2. Commercialization Ramp and Volume Adoption
  • 3.3. Pilot, Qualification and Production Transition

4. Market by Package Architecture

  • 4.1. Glass-Core FC-BGA Substrates
  • 4.2. TGV-Enabled Glass Core Substrates
  • 4.3. Embedded-Component Glass Substrates
  • 4.4. Glass Interposer and Hybrid Architectures

5. Market by Application

  • 5.1. AI Accelerators and GPUs
  • 5.2. High-Performance Computing and Server CPUs
  • 5.3. Custom ASICs and Chiplet-Based Processors
  • 5.4. RF and Millimeter-Wave Devices
  • 5.5. Co-Packaged Optics and Photonic Integration
  • 5.6. Other Advanced Semiconductor Packages

6. Manufacturing Technology

  • 6.1. Glass Panel Preparation and Handling
  • 6.2. Through-Glass Via Formation
  • 6.3. Seed Layer and Copper Metallization
  • 6.4. Redistribution Layer Formation
  • 6.5. Build-Up Dielectric and Fine-Line Routing
  • 6.6. Inspection, Singulation and Reliability Testing

7. Market by Customer Type

  • 7.1. Integrated Device Manufacturers
  • 7.2. Fabless Semiconductor Companies
  • 7.3. Foundries and Advanced Packaging Providers
  • 7.4. Package Substrate Manufacturers
  • 7.5. Defense and High-Reliability Electronics

8. Regional Market

  • 8.1. Asia Pacific
    • 8.1.1. South Korea
    • 8.1.2. Japan
    • 8.1.3. Taiwan
    • 8.1.4. China
  • 8.2. North America
    • 8.2.1. United States
  • 8.3. Europe
  • 8.4. Rest of World

9. Market Dynamics

  • 9.1. Drivers
    • 9.1.1. Large AI Package Warpage and Dimensional Stability
    • 9.1.2. Chiplet and High-Density Interconnect Scaling
    • 9.1.3. Panel-Level Manufacturing Economics
    • 9.1.4. Power Delivery and High-Speed Signal Requirements
  • 9.2. Restraints
    • 9.2.1. TGV Yield and Glass-Cracking Risk
    • 9.2.2. Metallization and Interface Reliability
    • 9.2.3. Long Semiconductor Qualification Cycles
    • 9.2.4. Continued Improvement in Organic Substrates

10. Competitive Landscape

  • 10.1. Market Structure and Technology Readiness
  • 10.2. Dedicated Glass-Core Substrate Suppliers
  • 10.3. Package-Substrate Manufacturer Strategies
  • 10.4. Specialty Glass and Materials Ecosystem
  • 10.5. Equipment, Inspection and Process Partnerships

11. Company Profiles

  • 11.1. Absolics
  • 11.2. Intel
  • 11.3. Samsung Electro-Mechanics
  • 11.4. Toppan
  • 11.5. AGC
  • 11.6. Corning
  • 11.7. SCHOTT
  • 11.8. Nippon Electric Glass
  • 11.9. Ibiden
  • 11.10. Shinko Electric Industries
  • 11.11. Unimicron Technology
  • 11.12. Kinsus Interconnect Technology
  • 11.13. AT&S
  • 11.14. Resonac Holdings
  • 11.15. Dai Nippon Printing

12. Recent Developments

13. Appendix

샘플 요청 목록
0 건의 상품을 선택 중
목록 보기
전체삭제
문의
원하시는 정보를
찾아 드릴까요?
문의주시면 필요한 정보를
신속하게 찾아드릴게요.
02-2025-2992
email
문의하기